| --- Log opened Mon Feb 06 00:00:47 2017 | ||
| olofk | shorne: Yeah, in HDL xor-ing a value with itself can still be undefined. movhi forces constant values into the reg | 06:29 |
|---|---|---|
| LoneTech | where did you get that from? a xor a will only be undefined if a is (for instance, metastable) | 07:23 |
| LoneTech | which is why bootloader code clears registers with movhi; a might already be x for uninitialized | 07:25 |
| LoneTech | sorry, I just didn't catch the context. definitely makes sense in simulation, when the registers in question are e.g. a RAM bank without reset. | 07:25 |
| shorne | olofk: LoneTech: thanks just wanted to clarify what I thought there | 07:48 |
| LoneTech | as for why movhi in particular, it affects the whole word and takes an immediate operand without being larger than any other instruction. | 07:49 |
| LoneTech | on x86 xor is used because it's smaller than any operation with an immediate operand | 07:50 |
| shorne | LoneTech: ah, thats a good point about instruction size | 08:29 |
| stekern | using l.andi works in simulations as well, even though it operates with te register as source | 08:52 |
| stekern | because 'x' & 0 = 0 | 08:53 |
| shorne | wallento: olofk; I was going through some things and noticed we have a few patches for newlib probably should go upstream | 09:12 |
| shorne | https://github.com/stffrdhrn/newlib/commits/for-upstream | 09:13 |
| shorne | I created this branch and it looks like its just these 3 patches (excluding travis) | 09:13 |
| shorne | anything else you remember? | 09:13 |
| shorne | olofk: on your change I will add your signoff if thats ok? | 09:14 |
| wallento | let me double check, shorne | 09:14 |
| wallento | you wanna bring them yourselves to the list? | 09:14 |
| wallento | I think they accept anyone, but you can just refer to me in the mail maybe | 09:14 |
| shorne | yeah, I was thinking I could send them | 09:15 |
| shorne | olofk: it seems newlib guys dont require the whole signed off by, also they dont seem to require ChangLog too | 09:23 |
| shorne | makes it easier for me :) | 09:23 |
| wallento | shorne: yeah, they are pretty easy | 09:51 |
| wallento | also it usually takes less than a day to get your architecture patches in | 09:52 |
| shorne | alright, I sent them, if I missed something we can add it later | 09:53 |
| olofk | shorne: Cool. Thanks. I should take a look at my tree. Might have something uart-related there too | 17:24 |
| mor1kx | [mor1kx] olofk opened pull request #45: Add FuseSoC .core file (master...corefile) https://github.com/openrisc/mor1kx/pull/45 | 18:00 |
| olofk | stekern, wallento: Care to merge? ^ | 18:00 |
| olofk | It's a trivial change. I'll do it myself instead :) | 18:08 |
| mor1kx | [mor1kx] olofk pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/3163cc336594e8bc14656ae903578a131169bbd6 | 18:10 |
| mor1kx | mor1kx/master 3163cc3 Olof Kindgren: Add FuseSoC .core file | 18:10 |
| mor1kx | [mor1kx] olofk closed pull request #45: Add FuseSoC .core file (master...corefile) https://github.com/openrisc/mor1kx/pull/45 | 18:11 |
| irssi_ | this is interesting | 18:30 |
| -!- Netsplit *.net <-> *.split quits: killertux, jonmasters, aburgess, LoneTech | 18:34 | |
| -!- Netsplit over, joins: killertux | 18:40 | |
| shorne | irssi_: ? | 19:16 |
| --- Log closed Tue Feb 07 00:00:49 2017 | ||
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