| --- Log opened Sun Feb 05 00:00:46 2017 | ||
| shorne | Hello, anyone know any history about Viktor's mail and uboot? | 03:44 |
|---|---|---|
| shorne | we had someone in here a few days ago asking about helping with uboot for openrisc. | 03:44 |
| shorne | I guess i need to know more about how the uboot handoff works | 03:51 |
| shorne | fyi. travis allyesconfig linux build is successful now, it takes 36 minutes! | 03:52 |
| bandvig | shorne: hello, could you give link to the u-boot issues? | 03:59 |
| shorne | bandvig: its not an issue, just this mail from Viktor... https://lists.librecores.org/pipermail/openrisc/2017-February/000415.html | 04:00 |
| shorne | He mentions there is some fix by jumping to 0x400000... | 04:01 |
| shorne | I replied to his mail, we can wait for his reply | 04:06 |
| bandvig | shorne: ah, perhaps I don't know something, but I see mail from Jakob Viketoft not from Viktor | 04:08 |
| shorne | Oh... not sure why I said viktor | 04:24 |
| shorne | Jokob | 04:24 |
| bandvig | shorne: so, I did not understand what you are talking about. | 04:26 |
| shorne | sorry about that, is it clear now? | 04:27 |
| bandvig | Yes, I'm writing an e-mai to LibreCore list with my experience regarding U-Boot an Linux | 04:28 |
| shorne | great thank you :) | 04:28 |
| shorne | fyi, I put a patch for r0 initialization : https://github.com/stffrdhrn/linux/commits/openrisc-4.11 | 05:23 |
| olofk | shorne: I remember the heated discussions from several years ago about how to clear r3. I was sure we had fixed that already. As Jakob says, l.movhi is likely the correct way to do it | 07:28 |
| olofk | stekern: Do you remember the history of this? Can't remember if it was discussed on IRC or on one of the old mailing lists | 08:47 |
| promach | hi, how do I run a waveform simulatin for the divider implementation as in line 404 of https://github.com/openrisc/mor1kx/blob/master/rtl/verilog/mor1kx_execute_alu.v | 10:57 |
| promach | is divider just implemented as '/' operator ? | 11:02 |
| promach | https://github.com/openrisc/mor1kx/blob/master/rtl/verilog/mor1kx_execute_alu.v#L475 | 11:02 |
| olofk | promach: | 15:21 |
| olofk | It depends on what the FEATURE_DIVIDER parameter is set to | 15:21 |
| olofk | I see that the default value in mor1kx.v is "SERIAL", so in that case the implementation starts here https://github.com/openrisc/mor1kx/blob/master/rtl/verilog/mor1kx_execute_alu.v#L404 | 15:22 |
| stekern | olofk: as I remembered it, jonas had some ungrounded reason for not changing it | 18:22 |
| olofk | stekern: ah ok. Well, let's change it now. | 18:37 |
| olofk | shorne: FYI, I added an option to mor1kx a while ago to set the register file to all 0 during initialization to better mimic the behaviour on an FPGA | 18:38 |
| shorne | olofk: others, why would we use movhi rather than "traditional" xor for clearing? | 23:38 |
| shorne | I guess because the data could be in a metastable state at init? | 23:38 |
| shorne | olofk: also, I did read the mor1kx code and see the clear RF at init code | 23:38 |
| shorne | ok, updaetd patch to movhi | 23:42 |
| shorne | Will send it for review in a few days. We will see what Jonas says about it. | 23:47 |
| --- Log closed Mon Feb 06 00:00:47 2017 | ||
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