| --- Log opened Wed Feb 18 00:00:46 2015 | ||
| stekern | I just synced our gcc to 4.9.2 | 00:45 |
|---|---|---|
| -!- rhythmx_ is now known as rhythmx | 01:04 | |
| olofk | stekern: Awesome! We should get wallento to run some regression tests on that | 06:47 |
| stekern | aren't there some automatic trigger when new pushes are done? | 06:59 |
| olofk | Ah.. I always forget how to find the page | 07:04 |
| olofk | http://openrisc.github.io/newlib/ | 07:09 |
| olofk | But I can't really figure out how to see what was built | 07:09 |
| olofk | Has anyone looked into Yocto for OpenRISC btw? | 07:16 |
| wallento | olofk: the "Build Passing" badge leads to the jenkins | 07:42 |
| wallento | it seems the build did not get triggered, I will check | 07:42 |
| wallento | ah, its still building, reason is that one of the virtual machines is incredibly slow | 07:44 |
| wallento | have no idea why.. | 07:44 |
| jeremybennett | olofk: Just taken delivery of a box of 400 (sorry went away to eat and sleep) | 08:27 |
| jeremybennett | olofk: Also just seen your email | 08:34 |
| olofk | jeremybennett: Cool. You got a new mail as well | 09:49 |
| _franck_ | jeremybennett: where do I start looking when I get a Segmentation fault from verilator while building a model ? | 10:13 |
| _franck_ | http://pastie.org/9958758 | 10:13 |
| wallento | olofk: everything fine with the continuous integration | 10:16 |
| _franck_ | jeremybennett: is Segmenation fault "normal" ? or should I fill a bug somewhere ? | 10:16 |
| _franck_ | this the the backtrace: http://pastie.org/9958763 | 10:16 |
| _franck_ | wallento: any clue about this verilator problem ? | 10:17 |
| wallento | I once had such an error and it turned out to be some verilog code that caused it. I think I just expressed the statement differently. But that doesn't really help you I suppose.. | 10:18 |
| wallento | I would try to narrow down the actual file | 10:18 |
| wallento | and send a bug report including this file | 10:18 |
| _franck_ | I'll try that. Anyone has ever verilate simple_spi ? stekern ? | 10:19 |
| olofk | _franck__: Same here. My problems with verilator has been becuase it failed to parse some verilog code. Don't know for your specific case though. Have you tried another version of verilator? | 10:20 |
| jeremybennett | _franck__: That sounds like a bug to me. If it's reproducible, post it as a bug on the Verilator website. From the backtrace it is happening in the very first pass, which suggests some language construct is not being handled properly in the parser. | 10:26 |
| jeremybennett | The result is a corrupt abstract syntax tree, which leads to the SEGV. | 10:27 |
| jeremybennett | If you have the GDB there, there should be a .gdbinit you can source, which will define pn and pnt commands to print an individual AST node and an AST tree respectively | 10:29 |
| jeremybennett | You could look at the value of nodep in frame 0, and if it is non-null use pn nodep to look at what the node contains. | 10:30 |
| rschmidlin_ | Hello guys, am I able to read special registers out of gdb? How? | 10:37 |
| olofk | rschmidlin_: Yes you can, but I can never remember the syntax. I'll check to IRC logs :) | 10:41 |
| olofk | rschmidlin_: I knew this was a good idea :) http://juliusbaxter.net/openrisc-irc/%23openrisc.2015-01-14.log.html#t13:31 | 10:43 |
| _franck__ | jeremybennett: brb, lan is down at work :( | 10:53 |
| rschmidlin_ | Olofk, I guess that's how you read the GPRS but not the SPRS | 11:07 |
| olofk | rschmidlin_: I think you can use register names like npc with the same command | 11:09 |
| olofk | Do you know that you can use OpenOCD directly for most of this btw? It's quite handy | 11:10 |
| olofk | Just start openocd, connect with telnet to port 4444 and you can run commands like "reg npc" to get the pc | 11:10 |
| olofk | I think most SPR registers are named according to the spec | 11:11 |
| jeremybennett | rschmidlin_: From memory I think there is a "spr" command in GDB. | 11:13 |
| jeremybennett | Just checked. There is "spr" to write the SPR and "info spr" to read the SPR | 11:15 |
| rschmidlin_ | Ahh thanks I already notices that spr sets | 11:23 |
| rschmidlin_ | It worked thanks Jeremy | 11:25 |
| wallento | rschmidlin_: info spr <group> <index> | 12:34 |
| _franck_ | in newer gdb it is "info registers <your_register_name>" or "info registers <group_name>" | 12:39 |
| _franck_ | "maint print reggroups" if you want to show group names | 12:39 |
| _franck_ | however, you need to use openocd as gdb server because it supports gdb target descriptors | 12:40 |
| _franck_ | jeremybennett: | 12:40 |
| _franck_ | Program received signal SIGSEGV, Segmentation fault. 0x000000000049931c in AstNode::iterateAndNext (this=0x1, v=..., vup=0x0) at ../V3Ast.cpp:779 779 if (VL_UNLIKELY(nodep && !nodep->m_backp)) nodep->v3fatalSrc("iterateAndNext node has no back"); (gdb) print nodep $1 = (AstNode *) 0x1 | 12:40 |
| _franck_ | I'll try to find where is the problem is source files | 12:41 |
| _franck_ | jeremybennett: wallento : this is the offending code: http://pastie.org/9959203 | 13:58 |
| _franck_ | changed it to a more classic syntax: http://pastie.org/9959205 | 13:58 |
| _franck_ | now it works | 13:58 |
| _franck_ | I didn't even know we could instantiate multiple modules like this... | 13:59 |
| wallento | never saw something like this before | 14:06 |
| wallento | you may put it up as enhancement in verilator maybe | 14:06 |
| sheridp | stekern: yes I basing my design off of altor32 | 15:10 |
| sheridp | olofk: I got it to work by changing the boot vector to be 0x0, and modifying the linker/makefile so that it gets placed there | 15:11 |
| sheridp | I'm not sure what the advantage of having everything at 0x10000000 is | 15:11 |
| Me1234_ | Orpsoc v2 does not work with mor1kx if I set the option in orpsoc_defines.v | 15:32 |
| Me1234_ | Using newest mor1kx | 15:33 |
| antgreen | olofk: re: 16-bit bus -- I picked 16-bit because that's what all the memory I was interfacing with presented. | 15:34 |
| Me1234_ | Linux jups to die(), orconf2013 timerled goes to board_exit() | 15:35 |
| sheridp | Hi all, I found some weird behavior concerning the difference between a local and global variable in C on the altor32 processor | 16:38 |
| sheridp | if I declare unsigned char X = 0x00; outside of main, and then modify inside of main, I'm not seeing the change during execution, but if it's declared inside of main, it works | 16:39 |
| sheridp | It's been a while since I've done C coding, but is this normal? | 16:40 |
| poke53281 | Nope | 16:43 |
| poke53281 | However, the varible is saved in another memory area, if you define is outside. But the behavior should be the same when you change the variable. | 16:45 |
| sheridp | Yeah, I saw from the lst file that it is using a l.sw, to write back to the variable, so I'm not sure why it fails | 16:46 |
| sheridp | Any thoughts on verilator vs icarus: My design works in icarus but when I put it on the FPGA (Xilinx) it doesn't work. Would simulating with verilator be more accurate to help find the problem? | 18:08 |
| olofk | _franck__: Never seen that syntax either. And in this case it only saves like 5 characters :) | 18:23 |
| olofk | sheridp: verilator is a lot faster, but it works best for synchronous designs and you need to make sure that everything is synthesisable | 18:25 |
| olofk | Me1234_: Does it work with an older mor1kx? orpsocv2 hasn't seen a lot of love the last few years | 18:27 |
| olofk | antgreen: We generally present 32-bit wishbone interfaces towards memory controllers, so that would make it easier to reuse those. Another option would be to put the wishbone upsizer I wrote a while ago between mox125 and the peripherals | 18:29 |
| olofk | But the upsizer isn't heavily tested, and costs a cycle of latency | 18:30 |
| Me1234_ | olofk: How old mor1kx? | 18:39 |
| Me1234_ | olofk: I think I will try to fix spi flash boot in ORPSOCv3. | 18:39 |
| Me1234_ | olofk: Now I see, that it is a problem with spi controller. | 18:40 |
| Me1234_ | olofk: sw/apps/spiflash hangs if a press s (status). | 18:41 |
| Me1234_ | olofk: with ORPSOCv2 it works well. | 18:42 |
| Me1234_ | olofk: sw/apps/spiflash is loaded into ORPSOCv3 by means of GDB and OpenOCD. | 18:42 |
| olofk | Me1234_: Sorry. Don't know how old mor1kx you would need. Just wondered if you had tested that | 19:12 |
| olofk | Having it work for ORPSoCv3 (or whatever we want to call it) would be a better solution | 19:13 |
| olofk | Can we bypass Jonas and send Linux patches upstream, or do we need to assign a maintainer first? | 19:23 |
| Me1234_ | olofk: mor1kx version cannot be determined, because it is not included in ORPSOCv2 | 19:24 |
| Me1234_ | olofk: Did ORPSoCv2 exist in 2009? | 19:31 |
| olofk | yes | 19:31 |
| Me1234_ | I see that the spi controller core has changed a bit. I did not look long at diff, but I see that something has changed. | 19:34 |
| Me1234_ | olofk: ORPSOCv2 spi controller released in 2002, ORPSOCv3 in, looks like 2004 | 19:50 |
| Me1234_ | olofk: Here is the error: | 19:50 |
| Me1234_ | > // Revision 1.3 2003/01/09 16:47:59 rherveille | 19:50 |
| Me1234_ | > // Updated clkcnt size and decoding due to new SPR bit assignments. | 19:50 |
| Me1234_ | > // Revision 1.2 2003/01/07 13:29:52 rherveille | 19:50 |
| Me1234_ | > // Changed SPR bits coding. | 19:50 |
| Me1234_ | olofk: new SPR bit assignments!!! | 19:51 |
| Me1234_ | olofk: sw/drivers/simple-spi/include/simple-spi.h this will not work with ORPSOCv3 | 19:54 |
| Me1234_ | olofk: It is used by sw/apps/spiflash | 19:54 |
| Me1234_ | olofk: Is linux dirver also affected? | 20:01 |
| Me1234_ | olofk: sw/drivers/simple-spi/include/simple-spi.h and simple_spi datasheet have different SPR bit mapping. | 20:08 |
| Me1234_ | olofk: By the way, did the maintainer of openrisc.net anwser you? | 20:20 |
| olofk | Me1234_: It's a bit complicated. ORPSoCv2 made local copies of some cores from OpenCores and they were modified, but these changes were never upstreamed | 20:20 |
| olofk | So for ORPSoCv3 I wanted to use the upstream versions instead, but this means that all ORPSoCv2 changes weren't copied | 20:21 |
| olofk | And ORPSoCv3 started in ~2011, not 2004 | 20:21 |
| olofk | It's a bit worrying if there are extra registers added in the orpsocv2 version of simple-spi. We should check the kernel driver | 20:23 |
| Me1234_ | olofk: My mistake I saw 2004-02-28 at the start of file, then there is a line $Log: not supported by cvs2svn. | 20:24 |
| Me1234_ | olofk : fusesoc downloads cores from svn, so it must be 2009(last modification of simple-spi svn) | 20:25 |
| olofk | Oh, was that modified in 2009? I would have guessed at latest 2004. Most of these cores haven't been touched in a very long time | 20:25 |
| Me1234_ | SVN Updated: Mar 13, 2009 | 20:26 |
| Me1234_ | Name: simple_spi | 20:26 |
| olofk | Looking a bit closer, the modification from 2009 is a directory restructuring by the opencores maintainers. The latest code change was almost 11 years ago | 20:29 |
| olofk | stekern: Does mor1kx recover from a bus error? Say that I'm trying to write to a peripheral that doesn't exist, can I just handle that and keep running? | 20:48 |
| sheridp | olofk: I got the altor32 (cpu_lite version) working for the mojo board, though it it is not currently using fusesoc. If you're interested, I'll put the files up on github. | 21:42 |
| --- Log closed Thu Feb 19 00:00:47 2015 | ||
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