| --- Log opened Tue Jan 10 00:00:07 2017 | ||
| stekern | shorne: to help me context switch into what you are speaking about, can you post a link to the code you're referring to? | 01:56 |
|---|---|---|
| shorne | example for Jesper and others who want to build a page allocator for | 02:32 |
| shorne | https://github.com/stffrdhrn/linux/commit/dbe811f49ec589a413a52dc9254411c97cda32ec | 02:33 |
| shorne | in traps.c line 347 | 02:33 |
| shorne | Ignore my first line, Im on phone, paste not working so well | 02:33 |
| shorne | Sorry, line 342 | 02:34 |
| -!- Netsplit *.net <-> *.split quits: eliask, killertux | 04:38 | |
| -!- Netsplit over, joins: killertux | 04:39 | |
| stekern | shorne: I agree, but it's going to be painful... | 06:19 |
| shorne | stekern: how painful I can think of a few things | 06:48 |
| shorne | 1. need to check the status of 'flag' at the time of exception to properly do l.bf, l.bnf | 06:48 |
| stekern | unconditional jumps should be pretty straightforward I suppose. conditional ones, more painful | 06:48 |
| shorne | 2. need to update r9 in case of l.jal / l.jalr (asuming its not updated) | 06:49 |
| shorne | I think the flag we can get pretty easy from ESR[f] | 06:49 |
| stekern | yea | 06:49 |
| stekern | maybe it's not *that* painful after all | 06:50 |
| stekern | but you have to emulate quite a bit | 06:50 |
| stekern | soon you have a whole or1k emulator within the kernel ;) | 06:50 |
| shorne | Yeah, there might be some cases I am not thinking of, at least there is not immediate arithmatic in the Jump instructions like l.j 5(r3) | 06:51 |
| shorne | Anyway, like I was saying I was researching a bit, it seems other architectures like microblaze have a BTR (branch target register). It stored the next PC in the case that the exception occurred in delay slot | 06:52 |
| shorne | and l.rfe will always use that instead of EPC. | 06:53 |
| shorne | I'll work on the patch, I think after that the whole patch set should be looking good to me | 06:53 |
| shorne | FYI, this is the set right now: https://github.com/stffrdhrn/linux/commits/openrisc-4.11 | 06:54 |
| shorne | stekern: check it out https://github.com/stffrdhrn/linux/commit/ed009fd306720d6f586c717c90ca49c79527cda1 | 09:44 |
| shorne | I implemented it, need to test it | 09:45 |
| shorne | it builds | 09:45 |
| shorne | cool, qemu doesnt have the instruction, but it crashes | 11:11 |
| shorne | jjasdfasdfasdf | 11:13 |
| shorne | sorry, thought I lost connection | 11:13 |
| shorne | I mean, qemu runnin the kernel gets into do_illegal_instruction, but the goes to die | 11:14 |
| shorne | so, its something I can debug | 11:14 |
| shorne | making progress | 11:14 |
| stekern | shorne: I've only tested the emulation code with or1k with the instructions disabled | 11:57 |
| stekern | or1ksim | 11:57 |
| shorne | stekern: I see, it might be my code causing the failure, still tracing where its going wrong | 12:12 |
| shorne | hmm, maybe bug in qemu, the instruction loaded in the emulator is not the one that caused the illegal instruction, instead its the first instruction in the 'function' that caused the illegal instruction | 12:24 |
| shorne | looks wrong | 12:24 |
| shorne | it pulls the right address from EPCR | 12:28 |
| shorne | but EEAR does not load the instruction address | 12:35 |
| shorne | it loads something else | 12:35 |
| shorne | hmm, patch qemu? or just do or1ksim | 12:36 |
| shorne | time for bed, so seems a but in qemu around handling illegal instructions , does not set EEAR correctly (expected to get PC for error instruction, instead got something else) | 12:37 |
| shorne | a bug | 12:38 |
| --- Log closed Wed Jan 11 00:00:08 2017 | ||
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