| --- Log opened Tue Sep 27 00:00:30 2016 | ||
| olofk | Verilator is many many times faster than an event-based sim such a s icarus or modelsim | 06:17 |
|---|---|---|
| olofk | Does anyone have a simple CDC component for Wishbone b2? | 07:05 |
| olofk | Or whatever it's called | 07:06 |
| olofk | Don't need bursts | 07:06 |
| ZipCPU|Laptop | Hmm ... I might ask the same question, but I want bursts ;) | 07:29 |
| ZipCPU|Laptop | kc5tja: I can often run 300k clocks/second in Verilator, for a device that is supposed to be run at 1MHz. | 07:30 |
| ZipCPU|Laptop | As for MAME, I still stand in awe of the Digilent employee who got Pacman running on a Basys-3---a board with too little memory for an offscreen buffer. | 07:31 |
| kc5tja | olofk: re: Verilator being faster than iverilog -- yes, I know as much. I don't know quanlitatively *how* much faster though. Anyway, I use iverilog because it's *way* easier to get working (I'm still unsuccessful getting verilator work, though I haven't put much effort into it), which makes it absolutely perfect for TDD-type development of Verilog. | 11:13 |
| kc5tja | That's why I am thinking of using iverilog for unit development purposes, and Verilator for integration testing, which tends to require more resources to complete since they're covering both positive and negative test cases. | 11:13 |
| kc5tja | ZipCPU|Laptop: That's a good data point to keep in mind. I'll bank on 300kHz real-world speed when trying to calculate time resources needed to run tests. | 11:14 |
| kc5tja | ZipCPU|Laptop: How did Digilent Dude do it? A/B scanline buffers, a la Atari 7800's MARIA chip? | 11:15 |
| kc5tja | olofk: What even is a CDC? | 11:18 |
| ZipCPU | kc5tjz: CDC = Clock domain crossing. | 11:33 |
| ZipCPU | As for Pacman & Basys-3 ... I'm still hoping to find out. I've asked, but haven't gotten an answer other than it was done. | 11:33 |
| ZipCPU | RE: Verilator ... you may find that you need to get rid of the always @(<non-clock-signals>) structures. I'm not sure if Verilator supports them--at least, I think I remember the last time I tried to coach you through verilator, these may have been the problem. | 11:35 |
| ZipCPU | As for all others who may know verilator better than I: Please correct me if I am wrong here. | 11:35 |
| olofk | All right. My basic CDC seems to work now | 11:49 |
| olofk | No burst or pipeline support, but I only need it to read and write single control/status registers in another clock domain | 11:49 |
| olofk | When in doubt about CDC, always consult Clifford Cummings | 11:50 |
| olofk | I think that his document on CDC strategies must be one of those documents I have read most times. | 11:50 |
| wallento | olofk, yes its excellent | 12:34 |
| wallento | all code you can find is based on it | 12:34 |
| -!- Shentino2 is now known as Shentino | 12:41 | |
| ZipCPU | olofk: Wow, my CDC search (which I did before your request) also lead me to Clifford Cummings' document. | 12:47 |
| -!- Netsplit *.net <-> *.split quits: poke53282 | 13:28 | |
| -!- wallento_ is now known as wallento | 15:36 | |
| -!- wallento_ is now known as wallento | 15:45 | |
| ams` | juliusb: any idea why opencores.org is down? (when you in the north pole for beer?) | 15:57 |
| olofk | ams`: They switched ISP | 16:08 |
| ZipCPU | Looks like OpenCores is back up and running! | 22:09 |
| --- Log closed Wed Sep 28 00:00:32 2016 | ||
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