IRC logs for #openrisc Monday, 2015-07-27

--- Log opened Mon Jul 27 00:00:33 2015
stekern_mor1kx shouldn't issue 0x1003, unless you have a very old version03:04
stekern_and if you really got the result you are claiming, that would indeed be wrong, but I somehow doubt that you actually got that.03:15
stekern_consider this test: http://pastie.org/1031379303:17
stekern_it should yield this result: http://pastie.org/1031379303:19
stekern_andrzejr: ^03:19
stekern_sorry, http://pastie.org/1031379403:20
stekern_is the paste with the result03:21
andrzejrstekern_, I'm using fusesoc, so mor1kx is from github/openrisc/mor1kx/master06:58
stekern_yeah, actually, maybe it's only on stores that the lower 2 bits are masked07:04
stekern_but, to answer your question. slaves should not rely on the lower two bytes if they are a 32-bit slave, if they are a 8-bit slave, they of course can. but the interconnect should then use the bytesel to generate these.07:10
stekern_and to answer your other question, 3(r0) will generate a wb_sel 0x1, it's the lsb you are picking out07:13
andrzejrstekern_, the code I'm using is in http://pastie.org/10313999 but (I think) there is nothing special in it. I've added dummy 8- and 16-bit reads for debugging.07:19
andrzejrthe _pbtn gpio is connected via an 8-bit bus, _sw and _led gpio's use 32-bit bus (wb_interconnect does not support 16-bit buses yet)07:20
andrzejrbus waveforms: http://i.imgur.com/ZCjlSG3.png07:24
andrzejrstekern_, wb_data_resize currently does https://github.com/openrisc/orpsoc-cores/blob/master/cores/wb_intercon/wb_data_resize.v#L4807:29
andrzejrthis works but it puts the byte in bits [7:0] of the register. The same value read with l.lwz ends up in bits [31:24] (are mor1kx registers BE encoded?)07:32
andrzejrstekern_, it seems like the root of the problem is trying to read an 8-bit IO (as defined wb_interconn) using 32-bit instructions.08:12
stekern_well, it's supposed to always put the result in the [7:0] bits of the register for an 8-bit load08:12
andrzejr32b reg read with 32b instruction -> OK, 8b reg read with 8b instruction -> OK, 8b reg read with 32b instruction -> fail.08:13
stekern_yes08:14
andrzejrwb_data_resize assumes that the access is always 8-bit wide. I will try to fix it later.08:15
andrzejrthanks for all the help, very useful.08:15
stekern_np08:18
olofkstekern_: Got any fancy keys signed lately?11:09
stekern_olofk: nope :(11:16
olofkstekern_: Ah ok. And still not sure you'll make it to orconf?11:17
stekern_not 100%, but I'll try to get there saturday and leave early sunday11:18
olofkCool. Hope you'll make it11:18
stekern_I just need to find someone to watch the kids11:19
olofkwebcam and money for pizza?11:19
stekern_good idea ;)11:20
--- Log closed Tue Jul 28 00:00:35 2015

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