IRC logs for #openrisc Tuesday, 2015-03-24

--- Log opened Tue Mar 24 00:00:35 2015
-!- _franck__ is now known as _franck_07:08
Me1234Do I need to use wb_intercon to connect Ethernet to RAM?09:18
olofkMe1234: You don't have to, but it can probably help you a bit10:58
olofkActually, I didn't go through wb_intercon when I hooked up the wb master interface of ethmac on the board I last worked on. Can't remember why11:08
olofkwallento: I see from the optimsoc.S board file in libgloss that you got a new Finnish e-mail address :)14:07
Me1234What for does ehtmac use the wb master? Is it only DMA?17:10
juliusbMe1234: yeah, I guess shovel the data it receives into RAM (DMA)18:02
Me1234Did I understand right that I need to define ETH_WISHBONE_B3 to connect the ETH master interface to RAM? I did not do it before.18:23
Me1234I defined ETH_WISHBONE_B3 now, connected eth master interface bypassing wb_intercon and slave interface through wb_intercon. Also added pin assignments to unconnected KSZ8051MNL (I have an expansion board).18:41
Me1234What am I doing wrong? It loops in bootrom.18:41
Me1234And nothing happens.18:41
Me1234Top file diff here http://pastie.org/1005064718:49
Me1234Diff between my version with bootrom and my version with ETH, currently not working.18:50
Me1234Wb_intercon diff here http://pastie.org/1005065618:52
Me1234Starnge thing. I cannot post to the mailing list : https://raw.githubusercontent.com/VladimirP1/S/master/Screenshot%20from%202015-03-24%2022%3A23%3A04.png19:26
-!- Netsplit *.net <-> *.split quits: mafm21:48
-!- Netsplit over, joins: mafm21:49
--- Log closed Wed Mar 25 00:00:37 2015

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