IRC logs for #openrisc Thursday, 2014-12-04

--- Log opened Thu Dec 04 00:00:56 2014
stekernhmm, did github fix the issues related to force-pushing to a pull-requested branch?06:44
poke53281What do you mean. I had such problems. And in the end I had to push with the force option.06:50
poke53281But I am someone who has still no a clue about the internal functionality of git.06:51
poke53281A functionality which you shouldn't have to know. But here git fails a little bit.06:53
stekernthis has nothing to do with git, it's just github07:24
stekernat least in the past, if you have a pull request open, receive comments on it, fix the issues and then force push the fixed changes, all previous discussion disappeared07:25
stekernolofk: at least you don't have to work with this insane bus interface I'm faced with... the semantics of a read transition is: 'read the value, then assert read-enable'07:28
olofkstekern: Like a I-can-now-confirm-that-I-have-read-the-value signal?08:12
stekernbut it's just called 'read', to ensure that you get confused how to expect that it'd work08:23
stekernmaybe they intended it to be read as 'redd' not 'reed' ;)08:25
olofkThe dual tempus of read is a very annoying bug08:40
olofkThe number of corner cases in my upsizer is incredible. I would have been completely lost without the new BFM08:41
olofkWell, I'm still pretty lost with it09:04
olofkYeah! Passed 5000 transactions now09:27
olofk50000 transactions!09:30
olofkJust a little worried since I'm testing against my own implementation09:31
olofkOh well. Time to write the (world's?) first 64-bit wishbone core09:31
stekernolofk: master of VHDL, tell me, is there a clog2 (or similar) function?09:52
stekernor do I have to roll my own?09:52
olofkNope. You need to roll your own09:53
olofkBut at least you can put it in a package so that it can be used in the header as well09:53
stekernyeah, I just wanted to avoid re-inventing the wheel if not necessary09:54
stekernso much time goes to pondering about what types signals should have and converting between them...10:12
stekernmy_sig(to_integer(unsigned(addr))); is my favourite10:13
olofkstekern: Yep. Love that as well. There is a poll on the VHDL mailing list about what propsed features that people would actually use. Closes today12:35
olofkI think that nicer conversion from std_logic_vector <-> integer is on the list12:36
-!- Netsplit *.net <-> *.split quits: trem17:13
--- Log closed Fri Dec 05 00:00:57 2014

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