IRC logs for #openrisc Wednesday, 2014-11-19

--- Log opened Wed Nov 19 00:00:34 2014
LimbPhew... good thing we have IRC logs. Almost had to recreate my openOCD config for the nexys by hand again03:28
stekern;)03:42
LimbAnd now to figure out why this wont work with a large amount of ram04:24
poke53281 Javascript is like anti-Batman: a language we all deserve, but not one we need.05:24
poke53281:)05:24
poke53281Some comment on Hacker News05:25
poke53281I post it here to save it in the logs. Otherwise I forget it ;)05:26
olofkpoke53281: You forgot to post it :)07:50
stekernolofk: I think the quote was the 'post'10:27
olofkahh11:07
olofkpoke53281: We need an UART for jor1k http://forum.espruino.com/conversations/257732/11:14
olofkWhere is that bastard maxpaln? His Wishbone BFM improvements are mean to my memory controller improvements11:52
-!- ysionnea1 is now known as ysionneau13:04
jakobknquestion about the mor1kx_true_dpram_sclk module: the input addresses are 32 bit wide, but the usage of this module in both immu and dmmu sends in a 6-bit wire (i/dtlb_trans_addr). Can anyone explain to me why this is done, or maybe point me to any literature that explains it?15:13
stekernjakobkn: the address width is configurable with the ADDR_WIDTH parameter15:29
stekernhttps://github.com/openrisc/mor1kx/blob/master/rtl/verilog/mor1kx_dmmu.v#L39115:29
stekern32 is just the default value (that get overridden)15:29
jakobknyeah I noticed but didn't think the tlb address width would be 6 bit. Unless OPTION_DMMU_SET_WIDTH is increased.15:41
jakobknactually, what are common values for OPTION_D/IMMU_SET_WIDTH and tlb ADDR_WIDTH?15:45
poke53281olofk: I meant the quote17:14
poke53281olofk: UART over the audio jack. Why not. The UART is already there, even two. The second one is hidden.17:15
poke53281This remembers me of a way long ago to copy the data from a C64 to a PC. The easiest (cheapest) way was over a wireless "audio connection".17:17
jeremypbennettIt's a couple of years since I last built an OpenRISC system. Where do I start? Clone fusesoc?18:02
stekernjakobkn: the set width can be 7 at most18:37
stekern6 or 7 are common values18:37
stekerni.e. 64 and 128 sets18:37
stekernjeremypbennett: fusesoc + orpsoc-cores is probably the best bet, yes19:07
--- Log closed Thu Nov 20 00:00:36 2014

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