| --- Log opened Tue Oct 21 00:00:46 2014 | ||
| -!- julzmb_ is now known as julzmb | 01:02 | |
| stekern | heh, openhub has a 'cost estimation' for projects | 07:05 |
|---|---|---|
| stekern | http://blog.openhub.net/project_codebase_cost/ | 07:05 |
| stekern | mor1kx: $211295 | 07:05 |
| stekern | orpsoc-cores: $3870905 | 07:06 |
| olofk | Yeah. orpsoc-cores is way too bloated | 07:07 |
| olofk | How does it work? I can't find a calculate button | 07:07 |
| stekern | it's under compare projects | 07:09 |
| stekern | https://www.openhub.net/p/compare | 07:09 |
| olofk | Hey, it doesn't list fusesoc | 07:10 |
| stekern | yeah, you hid it away | 07:10 |
| olofk | ah yes. I forgot that mor1kx was mostly written in coq | 07:11 |
| stekern | yup, and I can proudly claim that I'm "Most experienced in coq" | 07:14 |
| olofk | Looking forward to when memories with serial interfaces gets more common. How I hate DDR interfaces | 09:15 |
| hansfbaier | olofk: SDRAM even is a pain. I once wired one up myself manually.... But was a good learning experience | 09:15 |
| hansfbaier | olofk: with the .tcl file | 09:16 |
| hansfbaier | got one of the pins wrong, which yielded quite funky effects | 09:16 |
| wallento | stekern: where can I find how to use the fast context switch instead of ISR[0] properly? linux? | 09:25 |
| wallento | ah, its on openrisc.net.. | 09:28 |
| stekern | wallento: it's nothing fancy, just use the sprs | 09:37 |
| stekern | http://git.openrisc.net/cgit.cgi/stefan/linux/tree/arch/openrisc/kernel/head.S?h=smp#n139 | 09:37 |
| wallento | ah, so it does not use this fast contexts, but just the registers of the second context? | 09:38 |
| stekern | right | 09:38 |
| wallento | got it, thanks! | 09:38 |
| stekern | the whole fast context switch thing is a bit 'overengineered' IMO | 09:39 |
| stekern | and to properly support it is complex | 09:40 |
| wallento | yeah, I thought so when finally reading the arch spec now.. | 09:40 |
| stekern | but from a software perspective, it's perfectly 'legal' to use it like that | 09:41 |
| wallento | yeah, the only thing is the size, correct? | 09:42 |
| stekern | the size? | 09:42 |
| wallento | extra RAM, okay for FPGA of course, but we have like 20+ registers never used | 09:42 |
| stekern | ah, you mean like that | 09:43 |
| stekern | yeah, it's a bit of a 'waste' perhaps | 09:43 |
| wallento | all multicore is now in master? | 09:44 |
| wallento | cool | 09:44 |
| stekern | yup | 09:44 |
| wallento | time to kill my local stuff | 09:44 |
| wallento | thanks a lot for your effort | 09:45 |
| stekern | np | 09:47 |
| olofk | Has anyone come up with a way to regenerate Altera IP cores on the fly? As much as I complain on Xilinx, at least it's possible to regenerate coregen stuff for different devices from the command line | 09:53 |
| stekern | olofk: qmegawiz? | 09:59 |
| stekern | https://engineering.purdue.edu/ISLWiki/pub/Variations/FpgaFlow/quartus_command_line.pdf | 10:00 |
| stekern | another approach that I used with sockit is to use qsys to generate a system | 10:08 |
| stekern | and then just instantiate that system as a blob in your 'real' system | 10:08 |
| stekern | you can of course create several qsys files as well | 10:09 |
| stekern | you shoudl try fusesoc, it has support to handle that ;) | 10:10 |
| olofk | :) | 10:12 |
| olofk | FuseSoC is too bloated | 10:12 |
| olofk | I got the feeling that qsys could be used as an IP wrapper. That's good | 10:12 |
| stekern | but if you just have a single core, I bet qmegawiz makes more sense | 10:13 |
| olofk | stekern: So how do I do it? Can I create a qsys project that just contains a memory interface? | 10:14 |
| olofk | ah ok | 10:14 |
| stekern | you can | 10:15 |
| olofk | But you reckon that qmegawiz is the way to go anyway? | 10:16 |
| stekern | 'all' the interfaces that normally are connected inside qsys can be exported so it's visible on the generated top module | 10:16 |
| stekern | I think so | 10:18 |
| olofk | The documentation on qmegawiz is quite scarce | 10:19 |
| olofk | Fuckin' A! I think it worked | 10:24 |
| olofk | Managed to create a 2-port RAM at least. Doing the same for a PLL wasn't as easy | 10:30 |
| stekern | cyclone v pll's are at least easy to instantiate | 10:45 |
| stekern | https://github.com/openrisc/orpsoc-cores/blob/master/systems/sockit/rtl/verilog/clkgen.v#L127 | 10:45 |
| olofk | I generally prefer to instantiate PLLs manually. I mostly did it to see what kind of input and output files I should expect | 10:46 |
| stekern | I see and agree | 10:49 |
| stekern | wtf? https://lkml.org/lkml/2014/10/18/72 | 10:52 |
| olofk | What? | 10:57 |
| stekern | exactly | 10:58 |
| -!- heroux_ is now known as heroux | 10:59 | |
| wallento | stekern: when I set OPTION_RF_NUM_SHADOW_GPR I am also responsible to set OPTION_RF_ADDR_WIDTH and OPTION_RF_WORDS? | 11:01 |
| olofk | wallento: There's a bug in there that prevents it from running under modelsim | 11:01 |
| olofk | I fixed it locally. Can dig up the patch (if that's your problem) | 11:02 |
| wallento | I just get port width warnings | 11:02 |
| wallento | yes, that would be nice | 11:02 |
| wallento | I also have one that fixes the read_pointer and write_pointer size of the store buffer | 11:02 |
| stekern | RF_ADDR_WIDTH and RF_WORDS are per 'file', so no | 11:03 |
| stekern | but I had forgot about olofk's patches | 11:03 |
| olofk | IIRC modelsim treated the mismatched widths different than icarus, and some wires didn't get initialized properly in modelsim | 11:03 |
| olofk | stekern: Me too :) | 11:03 |
| stekern | (or rather the problems he had) | 11:03 |
| wallento | okay | 11:03 |
| olofk | wallento: Try this. Not sure if it's the right one though http://7aa8165da38c4da9.paste.se/ | 11:05 |
| mor1kx | [mor1kx] wallento opened pull request #17: Fix store buffer RAM pointer sizes (master...for-upstream) https://github.com/openrisc/mor1kx/pull/17 | 11:06 |
| wallento | thanks, I will try this | 11:06 |
| stekern | actually, RF_WORDS aren't used anymore | 11:06 |
| olofk | stekern: Feel free to commit it if you like it. I'm not very keen on preparing a proper patch for the sole benefit of getting my name in mor1kx :) | 11:07 |
| stekern | your name is already in it: https://github.com/openrisc/mor1kx/commits?author=olofk | 11:09 |
| wallento | Okay, I think some stuff changed also after your patch | 11:10 |
| olofk | stekern: That's probably the greatest patch ever :) | 11:11 |
| wallento | stekern: are you sure this is correct? https://github.com/wallento/mor1kx/blob/master/rtl/verilog/mor1kx_rf_cappuccino.v#L77 | 11:14 |
| wallento | From what I understand, the idea is that we can only access the shadow regs with SPR accesses: https://github.com/wallento/mor1kx/blob/master/rtl/verilog/mor1kx_rf_cappuccino.v#L320 | 11:15 |
| wallento | so, do we really need that with: https://github.com/wallento/mor1kx/blob/master/rtl/verilog/mor1kx_rf_cappuccino.v#L287 | 11:16 |
| wallento | *width | 11:17 |
| stekern | yes, since you have to do the writes into all three RAMs | 11:21 |
| wallento | but I can only read the lower 32 (via fetch adresses)? | 11:22 |
| stekern | wallento: http://pastie.org/9664838 <- that should apply | 11:23 |
| wallento | oh, yeah, just created a similar one :) http://pastie.org/9664839 | 11:24 |
| wallento | thanks | 11:24 |
| stekern | you have a typo in the second, should be fetch_rfb | 11:25 |
| wallento | ah, copy and paste error, thanks | 11:27 |
| wallento | I will take yours | 11:27 |
| stekern | ah, yeah, actually... you're right, it's not necessary to set the size to that | 11:27 |
| wallento | okay, shall I create a patch with reduced read width? | 11:28 |
| wallento | *write width | 11:28 |
| stekern | yeah, I think I just was future-proofing that... | 11:30 |
| wallento | we should also keep it that way then | 11:31 |
| stekern | ...for the event that I actually implement the full fast-context stuff | 11:31 |
| wallento | if you decide not to do it and want to reduce the GPR RF and the write pointer that goes into it, don't forget the wren signal should only be low if for context 0 | 11:33 |
| stekern | yeah, I was just looking at that | 11:33 |
| stekern | maybe I keep olofk's patch | 11:34 |
| wallento | I have another one, which I appended to the PR: https://github.com/wallento/mor1kx/commit/4763ba6bbdb46c0b4c30c850dfcf38f9f11bab70 | 11:51 |
| wallento | that was actually the reason OpTiMSoC didn't start at all.. | 11:52 |
| stekern | ah, good catch | 12:28 |
| mor1kx | [mor1kx] skristiansson closed pull request #17: Fix store buffer RAM pointer sizes (master...for-upstream) https://github.com/openrisc/mor1kx/pull/17 | 12:57 |
| wallento | stekern: one thing still seems wrong | 13:01 |
| wallento | the ADDR_WIDTH doubles with one shadow gpr | 13:02 |
| wallento | shouldn't it be +1 | 13:02 |
| wallento | because now I get 1024 GPRS | 13:02 |
| stekern | yes | 13:10 |
| stekern | it's wrong | 13:11 |
| stekern | it should be + | 13:11 |
| stekern | not * | 13:11 |
| stekern | I'll fix it | 13:12 |
| mor1kx | [mor1kx] skristiansson pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/1c0c091dd7089ff6213b9eb028b20cf46130034c | 13:16 |
| mor1kx | mor1kx/master 1c0c091 Stefan Kristiansson: cappuccino/rf: fix RF_ADDR_WIDTH... | 13:16 |
| wallento | actually it should be something like this: http://pastie.org/9665071 | 13:17 |
| wallento | but I doubt there is any sense in supporting 3 shadow GPR sets at the moment :) | 13:17 |
| stekern | hmm, not sure I follow. | 13:18 |
| olofk | Hey, I want to have 1024 GPRs! | 13:20 |
| wallento | if its (+ #GPR_SHADOWS ) you double the registers | 13:20 |
| wallento | with each extra shadow | 13:20 |
| wallento | instead you want to have the clog2 | 13:20 |
| wallento | in fact the clog2_width (special case for 1) | 13:20 |
| stekern | yeah... I'm not thinking straight | 13:20 |
| stekern | olofk: where is it that icarus can't handle functions? | 13:42 |
| wallento | you should not use the built-ins $clogs2 for ise | 13:43 |
| stekern | yes, and icarus can't handle static functions | 13:43 |
| stekern | I mean constant user functions | 13:44 |
| olofk | Yep. EDA sucks | 13:48 |
| wallento | stekern: does the reading from SPR work in Linux? for me it seems the pipeline does not wait one cycle after mfspr | 13:57 |
| wallento | in ctrl: | 13:58 |
| wallento | cycle 0: spr_read=1 spr_addr=0x421 | 13:58 |
| wallento | cycle 1: spr_gpr_dat_o=<expected_value>, spr_sys_group_read=0 | 13:59 |
| wallento | I think this is due to the fact that spr_addr=0xff78 in cycle 1 | 14:00 |
| stekern | are you speaking about spr in general or just the gpr? | 14:01 |
| wallento | gpr | 14:01 |
| wallento | I have this sequence: | 14:01 |
| stekern | I don't think much would work if it didn't work | 14:01 |
| stekern | in Linux I mean | 14:01 |
| wallento | http://pastie.org/9665190 | 14:01 |
| wallento | and I observe the stuff above | 14:01 |
| wallento | with #define SHADOW_REG(x) (SPR_GPR_BASE + 32 + x) | 14:02 |
| wallento | this should be correct | 14:02 |
| wallento | but it reads back zeros | 14:02 |
| wallento | maybe your Linux sequence is different and the spr_addr does not change | 14:02 |
| wallento | I will try to debug | 14:02 |
| stekern | it's possible | 14:02 |
| wallento | also spr_gpr_ack_o is never assigned, but this doesn't bother the pipeline at all ;) | 14:04 |
| stekern | umm... that sounds like a proper bug | 14:05 |
| wallento | yeah, I will try to track it down, but if you have a hint what are the signals I need to look at that would help me a lot | 14:06 |
| wallento | I always avoided the ctrl module :) | 14:06 |
| wallento | ah, spr_ack is always high for me | 14:07 |
| wallento | the missing debug unit acknowledges all time :) | 14:07 |
| stekern | there's been a lot of churn in the spr accesses lately | 14:07 |
| wallento | yeah, thats it | 14:08 |
| stekern | I've got to run to a train, but I can take a look later if you're still stuck then | 14:08 |
| wallento | good ride, I think that solved it | 14:08 |
| mor1kx | [mor1kx] wallento opened pull request #18: Don't acknowledge SPR access when DU is missing (master...for-upstream) https://github.com/openrisc/mor1kx/pull/18 | 14:10 |
| stekern | wallento: ah, good. needless to say, I haven't done much testing with the debug unit disabled | 15:11 |
| wallento | I will be your permanent tester :) | 15:11 |
| wallento | it works now, I think I will already put it in the newlib for upstreaming | 15:12 |
| wallento | waiting for pgavin now, who will put up his script to generate spr-defs next days | 15:12 |
| mor1kx | [mor1kx] skristiansson closed pull request #18: Don't acknowledge SPR access when DU is missing (master...for-upstream) https://github.com/openrisc/mor1kx/pull/18 | 15:16 |
| stekern | wallento: yeah, it's appreciated ;) | 15:16 |
| stekern | I think you spoke about it some day ago, but to get some CI going on with a couple of variations would be good | 15:17 |
| wallento | yeah, that also sounds good | 15:17 |
| wallento | I will have a look at mor1kx from fusesoc and or1k-tests in a baseline the next days | 15:17 |
| wallento | it is hopefully straight forward to check different configurations then | 15:18 |
| stekern | on another note, vice runs a lot faster when not using resid | 15:19 |
| stekern | maybe there are other options that can make it run at decent speed | 15:19 |
| mor1kx | [mor1kx] skristiansson pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/fb045beb382f...a960440a4c89 | 16:50 |
| mor1kx | mor1kx/master 4c4403d Stefan Kristiansson: steal utils from orpsoc-cores... | 16:50 |
| mor1kx | mor1kx/master a960440 Stefan Kristiansson: cappuccino/rf: *really* fix RF_ADDR_WIDTH... | 16:50 |
| mor1kx | [mor1kx] bandvig pushed 1 new commit to withfpu: https://github.com/openrisc/mor1kx/commit/70303fa0ddf228fd4ecfca081f8f48c104fa9081 | 17:09 |
| mor1kx | mor1kx/withfpu 70303fa Andrey Bacherov: Merge branch 'master' into withfpu | 17:09 |
| stekern | olofk: just finished blackwell legacy | 21:28 |
| olofk | stekern: What? How quick was that? I was just playing it, and I'm getting stuck all the time | 21:40 |
| olofk | Oh well. I'm sure that if I just find a grappling hook or a crowbar I'll be fine. Those are always good things to have in an adventure game | 21:46 |
| olofk | ok, finished it too now. That was extremely short | 22:11 |
| --- Log closed Wed Oct 22 00:00:48 2014 | ||
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