| --- Log opened Sat Oct 04 00:00:22 2014 | ||
| olofk | I think I got quartus to load the memory init file now by removing the bytewise write enables | 08:31 |
|---|---|---|
| olofk | I guess that's ok for a bootloader ROM/RAM, but it's not very nice if we want to use it as a small generic ram | 08:32 |
| olofk | Does anyone know if the Altera primitives support byte-size write enables? The Xilinx ones do | 08:34 |
| olofk | If so, I should probably do an altera-specific wb_ram backend | 08:34 |
| olofk | Can I see where an exception was triggered with gdb? | 08:36 |
| olofk | Like, which was the last pc address before entering the exception vector | 08:37 |
| stekern | olofk: epcr | 09:41 |
| poke53282 | The timing in JavaScript is so bad. I have added around 150 lines of logic just for the timing. But I believe somehow it get worse. | 16:50 |
| olofk | stekern: How do I get epcr? It wasn't in info all-registers | 19:27 |
| olofk | Aha... simulations helped me find the problem | 19:59 |
| olofk | Mismatch between wb_ram parameters and wb_intercon settings | 20:00 |
| olofk | I really need to split out those params to a separate file | 20:00 |
| olofk | What the hell is wrong with those leds? Simulations show that they blink | 20:02 |
| olofk | ahh. they do blink | 20:03 |
| --- Log closed Sun Oct 05 00:00:23 2014 | ||
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