IRC logs for #openrisc Friday, 2014-02-28

--- Log opened Fri Feb 28 00:00:59 2014
--- Log closed Fri Feb 28 00:47:36 2014
--- Log opened Fri Feb 28 00:56:03 2014
-!- ServerMode/#openrisc [+ns] by cameron.freenode.net00:56
-!- Irssi: #openrisc: Total of 1 nicks [1 ops, 0 halfops, 0 voices, 0 normal]00:56
-!- Irssi: Join to #openrisc was synced in 316 secs01:01
-!- ServerMode/#openrisc [-o juliusb] by cameron.freenode.net01:08
!cameron.freenode.net *** Notice -- TS for #openrisc changed from 1393548963 to 130192679001:08
-!- ServerMode/#openrisc [+ct-s] by cameron.freenode.net01:08
-!- cameron.freenode.net changed the topic of #openrisc to: Official OpenRISC Project channel | http://opencores.org/or1k | http://openrisc.net | wiki: http://opencores.org/or1k/OR1K:Community_portal | Mailing lists: http://lists.openrisc.net/ http://lists.opencores.org/ | forum: http://opencores.org/forum,OpenRISC | git: https://github.com/openrisc | IRC log: http://juliusbaxter.net/openrisc-irc/ | OpenCores in #opencores01:08
stekernblueCmd: haha. nice!04:25
daliashi04:35
stekerndalias: hi04:35
daliasi've seen news about openrisc a couple times recently and thought i'd stop by to see if anybody would be interested in helping add an openrisc target for musl libc04:37
stekerndalias: that sounds very interesting, and something that has been on my (long) list of things to do04:55
daliasaside from bits headers for types/kernel structs, there are only ~13 mandatory files for a port04:56
daliasso it's pretty easy as long as you know the target ISA and ABI decently04:57
stekernyeah, I can't imagine it being a much larger task than porting an arch to for example uclibc?04:57
stekernand that I recently did in about a week for another arch04:57
daliasit's a smaller task than for uclibc i think04:58
stekernok, so even better ;)04:58
daliasyeah slightly less than uclibc which seems to have around 25-30 such files05:00
daliaswell if you do get around to it, we're always available on #musl to answer questions, or you can contact me directly05:31
stekerndalias: thanks, don't be surprised if I take up on that offer =)05:42
stekern_franck__: I tested your verilator WIP patch, the problem with the -lelf being inserted "at the wrong place" still exist with that06:14
stekernolofk__: how did you get that to work in or1200-generic?06:16
stekern_franck__: this slightly hacky incremental patch fixes it: http://pastie.org/881119006:26
stekernI've got a feeling that it's hard to solve it in a less hacky way though...06:26
olofk_stekern: Hmm... I don't know really. It just worked™07:01
olofk_blueCmd: Congrats on the slashdotting07:01
olofk_Does anyone know other soft CPUs have been running debian before? It would be fun to claim that this is the first time07:02
stekernolofk_: did you remove the "custom" or1k-elf-loader that's in the or1200-generic verilator testbench?07:03
olofk_stekern: yep. And then I removed the extern declarations in tb.cpp and included #or1k-elf-loader.h and changed a few types07:04
olofk_I think that was all07:04
olofk_shameless linkedin+twitter promo for OpenRISC on Debian posted07:05
daliasolofk_, i think this is a first07:06
daliassee https://www.debian.org/ports/07:07
olofk_stekern: What is the linking problem you see with verilator/fusesoc?07:08
stekernthe problem is that when the final linking is done, I get: "-lelf /path/to/or1k-elf-loader.o" instead of "/path/to/or1k-elf-loader.o -lelf"07:09
stekernand then the references to libelf can't be resolved07:10
olofk_hmm... maybe someone who actually knows a bit about linking and stuff should have designed this instead of me :)07:12
olofk_What's the common thing to do here? Like in makefiles and stuff like that?07:13
stekernhmm, I don't know, but don't you usually have the '-l' last?07:34
stekernit's just that verilator put anything in the -LDFLAGS command line option first07:35
stekern(and the whole -LDFLAGS thing is introduced with _franck__'s patch, so no need to worry about taking the blame olofk_ =))07:39
stekernI think I agree about keeping the orpsoc-cores name07:42
stekernif anything, it could actually be renamed to orpsoc07:42
stekernjust to see if we can confuse our users any more07:43
stekernbecause it's essentially what orpsoc-cores is, orpsoc, which utilize the fusesoc tool, just like the old orpsocv2 utilized 'gnu make'07:44
olofk_stekern: Yes, I've been thinking about that too, but I'm thinking of taking the consusion one step further by renaming one of the systems (like or1200-generic) to orpsoc instead08:08
olofk_stekern: Good to hear about the elf-loader. Did you get it running eco32 elfs?08:09
-!- rah_ is now known as rah08:15
stekernolofk_: yes, it works like a charm with eco32 elfs08:25
stekernI got my core to do a "Hello world" in the verilated environment two days ago08:25
olofk_c00l08:30
_franck_web_stekern: I don't know why I don't have this linking problem08:33
olofk_Me neither08:34
stekernwhat verilator version are you using?08:35
olofk_3.850 I think08:35
olofk_Which linker are you using?08:35
stekernGNU ld (GNU Binutils for Ubuntu) 2.23.52.2013091308:37
olofk_I'm using the binutils one too. Not sure which version though08:38
stekernwhat's the output of the last g++ command when you run the 'fusesoc' command?08:39
stekerndoes the -lelf come before the or1k-elf-loader.o or after?08:39
stekernmy verilator version is: Verilator 3.855 2014-01-18 rev verilator_3_854-13-g470f12f08:39
_franck_web_however, if it still works on our configuration with your patch, let's push it. That would make fusesoc more error proof. (however, still be good to know _why_ )08:40
stekernto be clear, this is how that line looks for me *when it works*: http://pastie.org/881150308:44
stekernmaybe, to be bullet-proof, the LDFLAGS should be surrounded by start-group, end-group too...08:50
MegafHi all13:37
MegafCan one simulate or emulate OpenRisc using QEMU?13:37
olofk_Megaf: Yes we can!13:42
Megafcool13:43
MegafPhoronix made me know or remember about OpenRisc yesterday and I found it pretty interesting13:44
MegafThere is an article about a Debian port to OpenRISC and I'm really curious about the actuall performance of OpenRISC, either on QEMU, FPGA and on actual hardware13:47
MegafI know theres still no actual hardware13:48
Megafolofk_: ping13:49
olofk_Megaf: I would count our FPGA implementations as actual hardware, but it seems like many people don't13:50
olofk_anyway, you can give OpenRISC a spin on an FPGA, in a RTL simulator, on or1ksim (the reference ISA simulator), jor1k (the javascript implementation) or in qemu13:51
MegafI'm going to compile orlksim13:52
Megafred13:53
Megafoops13:53
Megafcompiling, I hope it doesnt take too long13:54
Megafdone, compiled (I'm using ARM here by the way)13:57
MegafblueCmd: Ping13:59
MegafI'm looking for you13:59
MegafblueCmd: where can I get your initramfs or vmlinuz14:01
MegafI just compiled the simulator here14:01
blueCmd:(16:59
blueCmdhe's gone17:00
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--- Log closed Sat Mar 01 00:00:00 2014

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