IRC logs for #openrisc Friday, 2013-04-26

--- Log opened Fri Apr 26 00:00:32 2013
hnostekern, any luck trying or1200?06:20
hnohow do you build or1200 for de0 nano? I don't find it's board suport files.06:34
hnoaha, you have a git repository for orpsoc with de0 nano support.06:40
hnoand a bit of other changes as well.06:52
stekernhno: sorry, had a crazy evening yesterday, didn't get around to test it07:11
stekernI could test on an atlys board right now if it gives you any comfort ;)07:15
hnoI guess that uses another arbitrer and sdram controller?07:23
stekernyep07:24
stekernor, same arbiter, but different memory controller07:24
stekernbut that's the case between de0-nano and ordb2a as well07:25
stekernhno: Jonas tree boots fine on the atlys board at leas07:30
stekernthat was with the simplified kernel config though, let me see with the config you mentioned yesterday07:31
hnohow much do de0 nano and ordb2a actually differ? Seems very similar in terms of specifications.07:38
hnoapart from slightly different I/O.07:39
stekerndifferent memory and ordb2a has ethernet, that'07:41
stekerns about it I think07:41
hno What memory do the de0 have?07:41
stekernI hit a warning with the config you mentioned yesterday, but apart from that it boots up07:42
stekernhno: it has 32mb of 16-bit SDRAM07:44
hnoin what way do the memory differ then?07:49
stekernah, I thought there was a different memory on that07:50
stekernsorry about the confusion07:50
stekernde0-nano and that board still have different memory controllers07:51
hnoyes07:52
mor1kx[mor1kx] skristiansson pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/c6e27327a49cd95622640886a653c6a552aeccf408:06
mor1kxmor1kx/master c6e2732 Stefan Kristiansson: icache: (temporary) disable out of refill cacheline accesses....08:06
stekern^ bandaid for the regression on the atlys board08:06
hnothe arbiter does differ a bit as well.08:12
hnoa bit more than expected.08:12
hnoee71ffe3159ced7098ecb4c85950c68a336fa72008:14
stekernhno: I wouldn't be concerned about that in regard to your problem08:35
stekernI didn't have that applied when I booted 3.8 on de0 with mor1kx the other day08:35
stekernand 3.4 have worked fine without that too08:36
stekern3.4 on or1200 that is08:36
stekernyou can of course apply it and test if it makes a difference08:37
hnoHm.. tried to merge with your tree but for some reason it now tries to include the vga_lcd module, and fails.08:48
stekernah, yeah I see why08:50
hnoError (10170): Verilog HDL syntax error at vga_csm_pb.v(141) near text "do";  expecting an identifier ("do" is a reserved keyword ) File: /home/henrik/SRC/orsoc/orpsocv2/rtl/verilog/vga_lcd/vga_csm_pb.v Line: 14108:50
hnoafter adding missing vga_defines.v08:51
stekernquick and dirty fix, remove the vga_lcd directory08:51
hnowhat would the proper fix consist of?08:51
stekernno idea without looking closer08:52
stekern"I see why" was only to "it now tries to include the vga_lcd...", not the "and fails"08:53
hnostill trying to learn the basics of how things fits together.08:53
hnodoes it always build all modules even if not needed by the target board?08:53
stekernyes, all that are in the root rtl/verilog and under the board/xxx/rtl/verilog directories08:54
hnook.08:54
stekernthey are only compiled though08:56
hnook. and the error is quite self explanatory, just need to replace do with another name for the signal.08:56
stekernnot sure why it chokes on that for you though, my quartus is all happy about it08:56
hnowhich version do you have?08:56
stekern12.1sp108:57
hnoand mine is 12.1 (no sp1 yet).08:57
stekernalso worked in 11.0sp108:57
hnodon't know.08:58
hnooh, it got to placement now.08:58
stekernno, it was a statement: "it also worked in 11.0sp1"08:58
hnoYes, I understood that.08:59
stekernaha, I misunderstood you then =P08:59
hnoI meant that I then do not know why it works for you but not for me and have no further ideas on what might be the reason.08:59
stekernyeah, got that now08:59
hnoI guess that a different sdram controller is likely making a difference for the bus error problem I am seeing.09:01
stekernprobably09:01
stekernwhat's your sequence when you load with gdb though?09:02
hno1. program the FPGA.09:02
hno2. gdb vmlinux, then load.09:03
hno3. sys spr 10009:03
hno4. continue09:03
hnospr npc 100 I meant.09:03
hnoworks great for both u-boot & linux-3.1.09:04
stekernthat should work, it's usually best to reset the board before loading linux09:04
stekernyou could always test with the de0 nano memory controller if you suspect that's what's failing09:06
hnoYes, was thinking of that. Hence the questions on what memory the de0 actually have.09:07
stekernshould pretty much just be to copy the wb_sdram_ctrl directory and copy-paste the module instansiation in orpsoc_top.v09:07
hno3.8 booted fine now.09:08
hnostekern, there is a numer of other or1200 fixes in svn that is missing in your git repo.09:10
stekernI know, I haven't synced against svn in a while...09:13
hnonow the question is, did the problem get fixed by the arbiter fix, or bu some other change in your orpsoc repo...09:14
stekernheh09:15
stekernyou should have tried without merging the arbiter fix first09:15
hnonah, wantet to try with something close to what you say works today for you first. Easy to bisect which change is the importan one later.09:16
hnoif needed.09:17
hnoPING www.sunet.se (192.36.171.156): 56 data bytes09:18
hno64 bytes from 192.36.171.156: seq=0 ttl=57 time=24.949 ms09:18
hno:)09:18
stekernnice09:18
hnoA diff says that it must have been the arbiter fix. There is no other changes now in the merged tree, only board changes09:29
hnoDo you know of there is some email discussion or bug entry for the arbiter fix?09:31
stekernno, just juliusb noticed it when playing with mor1kx on de0 nano09:33
stekernso I pulled that patch out of mor1kx-devenv into my orpsocv2 repo09:34
stekernthe fix is a bit of a performance killer though09:34
stekernalternative quick fix is to remove the _r sel signals, but that (might) create comb-loops09:35
stekernthe right thing would be to do a proper arbiter instead09:36
stekerneven with a simple round robin scheme09:36
olofkI guess we soon can assume at least partial system verilog support in all the tools we use. That makes it a thousand times easier to write a more generic arbiter10:27
stekernapart from the obvious thing with lack of multi-dimensional array port declarations, what else makes it hard?10:29
olofkYou just nailed it ;)10:29
olofkAlthough records would be nice too of course, but not critical10:30
stekernsomething close to this would probably suffice: http://git.openrisc.net/cgit.cgi/stefan/orpsoc/tree/boards/altera/de0_nano/rtl/verilog/wb_sdram_ctrl/arbiter.v10:34
olofkYeah, that's a lot better10:36
olofkIt's a single slave port, right?10:36
stekernit's for the sdram controller, it arbiters between master accesses10:40
olofkI did something similar for orpsocv3, but strictly priority based instead of round robin10:43
olofkThere's a separate demux too, for single master, multi slaves10:43
olofkhttp://git.opencores.org/?a=tree&p=orpsoc&h=9ba3f1b4ba58c2d393731eb734a978ac5093a64f&hb=19dd245082de035e25f48e64108e70f5f865bc56&f=cores/wb_utils10:43
olofkYour URL looks a lot better than mine :(10:44
stekernnah10:46
stekernhmm, can you just yank away the control from another master like that?10:52
stekernor am I completely misreading the code?10:53
olofkehhm.. I haven't like... ehhmm... tested it very much10:53
stekernah, sorry, it's combinatorial10:53
olofkAre you looking at the mux or the arbiter, btw?10:54
stekernthe question remains still though10:54
stekernI'm looking at the wb_arbiter.v10:54
olofkYou're right. There's no logic to check if cycles are properly finished10:55
olofkI think it worked in my case since it was only used with the debug if and the cpu, and the cpu was stalled10:57
stekernyeah, it's probably fine between those two11:26
mor1kx[mor1kx] skristiansson pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/20bc31a5d0dffa64a7fb0e5ab5c8ac02eb7d136912:32
mor1kxmor1kx/master 20bc31a Olof Kindgren: Exclude gpr accessor functions from synthesis...12:32
andresjkstekern, it's there any documentation on the mor1kxx? I have found nothing... regarding the specs, motivation and difference between the or1200 arch15:49
stekernandresjk: all 'official' documentation is in the doc/ directory17:01
stekerna lot of the information you are asking about was handled in juliusbs talk at the openrisc conference though17:02
andresjknice, I will check it out. ty17:03
stekernhttp://opencores.org/or1k/OpenRISC_Project_Meeting <- slides and video available there17:03
andresjkthanks17:04
hnoHow hard is it so switch an orpsoc design between or1200 and mor1kx?17:10
hnostill haven't grasped even the basics of how things pulls together, but feeling brave after getting that arbiter issue fixed :)17:14
hnoI know stuff needs to be done in orpsoc_top.v, but what else?17:15
stekernhno: not much else17:19
stekernthere's an example of how it can be done in my git repo and in the mor1kx-devenv17:20
hnoyour de0 nano?17:36
stekernyup17:37
hnothanks. I see it.17:38
--- Log closed Sat Apr 27 00:00:33 2013

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