| --- Log opened Tue Apr 09 00:00:07 2013 | ||
| stekern | yeah, the permission stuff is annoying, but you do it once and then forget about it | 02:20 |
|---|---|---|
| stekern | agree, the tools are nice, but we have to be fair, the default settings in the quartus project for compiler effort is low | 02:24 |
| stekern | s/nice/fast | 02:24 |
| stekern | I want that jtag serial port as well, not so much because I want to use it, but it'd make the de0-nano board more useful for others | 02:44 |
| stekern | ok, let's send cappuccino to fat camp! | 04:30 |
| stekern | but first, investigate if that critical comp op path can be untangled a bit | 04:31 |
| stekern | I think some can be gained by moving some of the muxes for the a and b operands into decode stage | 04:33 |
| stekern | especially the b operand muxes do some heavy instruction decoding to determine the imm or reg | 04:36 |
| stekern | I think we are really paying for the haphazardous instruction encoding scheme of or1k here | 04:38 |
| stekern | also, maybe it's better to read the rf a port in decode as well, since ram outputs are sloooow! | 04:43 |
| stekern | otoh, here juliusb's idea with using flops as registers could be worth considering as an alternative | 04:45 |
| olofk | I would say it's not that costly to use register based registers | 05:40 |
| olofk | But just putting a register stage on the output would achieve the same thing too | 05:41 |
| olofk | on the RAM output I mean | 05:41 |
| _franck_ | juliusb: you mean get the JTAG serial port working in openOCD (via the telnet interface for example) ? That would be great | 05:51 |
| stekern | olofk: yeah, timing wise, adding a register on the output would achieve the same, but not functionality wise | 05:52 |
| stekern | it's of course simple to just use register based registers, just tell the synthesizer that you want the ram like that | 05:54 |
| stekern | our rf would need a bit adjusting to not infer 2*32 registers though | 05:55 |
| stekern | we probably should make the rf_ram modules interface a true dual port ram, and select inside of it wether you want it to implemented as a true dual port ram or 2 "non-true" dual port rams | 05:58 |
| stekern | (I call those "non-true" dual port rams single port, even if they have seperate read and write) | 05:58 |
| stekern | because now it always get inferred as two blockrams, while some targets would have support for inferring at as one true dual port ram | 06:00 |
| stekern | s/at/it | 06:01 |
| stekern | I meant 2*(32*32) registers above | 06:16 |
| olofk | Why don't we just store the register contents in the cloud? That would allow us to have more registers | 06:49 |
| olofk | I need to start hacking on my cloud_if | 06:49 |
| ams | bv rocks. | 06:49 |
| ams | erm, wrong window. | 06:49 |
| stekern | olofk: the biggest problem with storing the register contents in the cloud is domain crossing | 07:10 |
| stekern | you know, cloud domain crossin (CDC) | 07:11 |
| stekern | +g | 07:11 |
| stekern | https://github.com/carpe-project | 07:49 |
| stekern | that seems to be the project peter gavin is involved in | 07:49 |
| stekern | looks like there's an or1k VHDL implementation here: https://github.com/carpe-project/carpe/tree/master/vhdl/cpu | 07:52 |
| olofk | I hate cloud domain crossing :( | 08:56 |
| olofk | Nice. I remember he said that he was going to do a VHDL implementation of or1k, but I haven't seen any code before | 08:58 |
| stekern | me neither, I just saw that he had committed stuff there when I was checking his or1ksim patches | 09:26 |
| hno | There is some max-size related change in 3.2.8 which might conflict. | 10:09 |
| hno | Err. wrong channel. Sorry. | 10:10 |
| olofk | I got an invitation to an Altera-with-ARM workshop organized by Arrow. Not very OpenRISC-related, but it's $99 and they give away hardware that looks really cool | 12:12 |
| olofk | http://www.arroweurope.com/index.php?id=831 | 12:12 |
| stekern | sounds interesting | 12:15 |
| mor1kx | [mor1kx] skristiansson pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/5daf75927003c2baff4afbd3354feeecd96c34f4 | 12:21 |
| mor1kx | mor1kx/master 5daf759 Stefan Kristiansson: cappuccino/execute_ctrl: simplify execute_valid/waiting logic | 12:21 |
| olofk | I think that the FPGA is useful even without those two embedded silicon heaters | 12:27 |
| stekern | heh, indeed | 13:20 |
| stekern | it's being held in Espoo as well, maybe I should ask at work if I can go | 13:21 |
| olofk | You should do that so I have someone to pester with questions about how to make the board work under Linux ;) | 13:33 |
| olofk | It's a pretty large FPGA. 110kLE. Shouldn't be any problems to fit orpsocv3 on that | 13:34 |
| stekern | then you could cross compile our toolchain for arm and use it as a portable openrisc dev machine ;) | 13:44 |
| * juliusb just ordered is very own DE0 Nano | 14:11 | |
| @juliusb | s/is/his/ | 14:11 |
| -!- Netsplit *.net <-> *.split quits: hno | 21:33 | |
| --- Log closed Wed Apr 10 00:00:08 2013 | ||
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