IRC logs for #openrisc Saturday, 2012-11-24

@stekernolofk: yup, it works pretty well iirc06:10
@stekernhttp://i6.aijaa.com/b/00569/7837382.png06:14
@stekernI repeat; pipeline hazards are a b*tch11:13
@stekernjuliusb: I start to understand why you choose to cut it off at execute ;)11:16
@stekernin hindsight, it's performance is pretty impressive considering lsu ops are bound to be pretty slow11:25
@stekernthey are still slow in my rework since I'm using the registered output from alu as the address, so 1 cycle extr latency11:37
@stekernconnecting the output straight to the adder output creates that really long path out on the wb bus11:38
@stekernI'm thinking about connecting the exec address to the cache only, so we'll get fast cache hit accesses, but slower "cache miss" (or out of cache accesses)11:39
@stekernbut let's make it work as it is first...11:41

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