| stekern | first time in 14 months I pushed something to my linux repo :) | 09:43 |
|---|---|---|
| stekern | just syncing to jonas repo and switch to or1k toolchain | 09:43 |
| stekern | it's funny, when or1k-linux is built with shared enabled, you can't actually use that to build the kernel anymore | 09:44 |
| stekern | (because libgcc.a will contain references to _GLOBAL_OFFSET_TABLE_) | 09:53 |
| stekern | I'm finally getting around to test Gong Tao's work with the spi flash on the de0-nano board | 10:37 |
| stekern | he spotted that the flash is actually 8MB and not 1MB as the documentation states | 10:38 |
| stekern | thus u-boot + linux image will fit nicely in there | 10:38 |
| stekern | works beautifully | 10:42 |
| stekern | # uname -a | 10:43 |
| stekern | Linux openrisc 3.4.0-55392-g1b50055-dirty #1 PREEMPT Thu Sep 27 10:10:27 EEST 2012 openrisc GNU/Linux | 10:43 |
| juliusb | :) | 10:57 |
| _franck_ | do you have any idea why a design would not work with ic ? (it doesn't work with IC + NO_BURST, so seems not related to burst) | 14:04 |
| juliusb | _franck_: is it software not aware of the cache? ie. not initialising it or peripherals in an address space which is getting cached but teh software not assuming that? | 14:06 |
| juliusb | and which cache causes the failure, IC or DC? | 14:06 |
| juliusb | sorry, IC | 14:06 |
| juliusb | IC it's IC :) | 14:07 |
| _franck_ | it is barebox. It doesn't initialise the IC. I tried to invalidate it at startup like in linux head.S but it doesn't change anything | 14:17 |
| _franck_ | tonigh I'll try to disable it, reloc, then enable it later | 14:17 |
| juliusb | you should invalidate it before trying to use it. | 14:46 |
| juliusb | what about just leaving it disabled? | 14:46 |
| juliusb | and which system are you using? | 14:46 |
| _franck_ | yes I could leave it disable.. | 14:58 |
| _franck_ | I'm using orpsoc2 on a altera board | 14:58 |
| _franck_ | I could leave it disable...however it should work... | 14:59 |
| _franck_ | I copied the init from uboot, and AFAIR it doesn't touch cache | 15:04 |
| _franck_ | I'm working on barebox | 15:04 |
| juliusb | OK, well, what do you mean it doesn't touch cache - it doesn't initialise it but turns it on, or doesn't even turn it on? | 15:22 |
| _franck_ | it doesn't turn it on. is it disable by default ? | 15:32 |
| juliusb | it shoudl be disabled by default, yes, at reset, the enabled bit in SR should be 0 | 15:35 |
| stekern | _franck_: I have this work-around in u-boot: http://git.openrisc.net/cgit.cgi/stefan/u-boot/commit/?id=7f40aaef61a7b00ff44294ca59ceb54303a32ab0 | 16:03 |
| stekern | not perhaps related to your problem, but or1200 IC is a bit flaky when you invalidate it "live" | 16:03 |
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