IRC logs for #openrisc Sunday, 2012-07-29

Jiahi all, good evening?05:18
Jiaqemu-or32 codes is checkin now! http://git.qemu.org/qemu.git has or32 codes now!05:19
stekernJia: nice!06:17
Jiastekern: good morning :)06:26
stekernmorning at least ;)06:31
Jiastekern: If i wanna add simd insns to LLVM, such as lv.add, is there a good example?06:38
stekernI'm not sure, haven't looked much at vector instructions.06:51
stekernI'm currently working on adding floating point support06:53
stekernDo you have support for lv. instructions in qemu? or are you planning on adding that?06:54
Jialv.* need by or64, am I right?06:58
stekernyou'll need an 64-bit implementation (ORBIS64) for lv.* (ORVDX64) but you don't need to implement ORVDX64 to implement ORBIS6407:03
stekernour llvm backend is currently 32-bit biased btw07:05
Jia:-)07:07
JiaI'll read your code07:07
Jiastekern: http://github.com/asl/llvm-openrisc.git  https://github.com/skristiansson/llvm-or1k.git witch one is yours?07:45
Jialooks like many people working on llvm-or32 and keep himself git tree07:52
stekernhttps://github.com/skristiansson/llvm-or1k.git08:10
Jiastekern: did you know what happen to http://git.openrisc.net08:11
Jiabinutils and gcc is empty!08:11
stekernthe other one is an example backend for the LLVM conference, it's mostly just stubs08:11
Jiathx, got that. asl's code is more simple to a newbie, your code is the real product08:13
stekernthis are the ones I am using: https://github.com/pgavin/or1k-src and https://github.com/pgavin/or1k-gcc08:13
* Jia saw jonas still working on uClibc08:13
Jiastekern: GFW killed github, but I can clone your code still :-) and, I've already cloned your code08:14
stekernreally? GFW is blocking github?08:17
JiaGFW block anything it want, I can clone from github, but can NOT push my code on it, so I keep my projects on google-code08:20
stekernah, probably the secure channel is what it dislike then08:21
Jiawhat it dislike too much :-)08:23
jemarchhi14:23

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